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technical note td300 used in power mos and igbt driving AN685/0299 by r. liou ? td300 is designed to drive up to three power mos or igbts (low side and/or high side) from cmos or lsttl logic signals, or pulse transformers. it integrates: . three buffers, . a current sense comparator for automatic shut down if overcurrent is detected, . an under voltage lockout feature to avoid unproper output states, . an operational amplifier (that allows cad conversion for the mcu, for example). the td300 driver provides the designer with a low cost, space saving, flexible and rugged solution for a wide range of applications (motor driving, switch- ing power supplies, dc/dc converters, any appli- cation requiring low or high side driving). introduction part number temperature range package nd td300i -40 o c, +105 o c ?? order codes inpu t a cc v + output c 1 2 3 4 8 5 6 7 9 10 11 12 13 14 oa input n.c. output b output a gnd se nse input oa output input b input c enable alarm pin connections 1/11
1. functions 1.1. inputs / outputs characteristics 1.1.1 inputs 1.1.1.1. v cc /gnd the td300 supply voltage is 15v, and the quies- cent current is 1.5 ma. if the positive power supply voltage is insufficient, the td300 automatically locks its a/b/c outputs at low state (0v) in order to avoid unproper switching states due to insufficient gate voltage. this under voltage lockout function is detailed in section 1.2. 1.1.1.2. inputs a/b/c the logic inputs of the td300 are cmos / ttl logic compatible (0 to 5v). the input current is extremely low (around 10pa) due to cmos inputs. 1.1.1.3. enable the enable pin, like the a/b/c inputs, is a cmos / ttl logic compatible input. when the enable pin is low, the outputs (out a/b/c) are blocked at low state. when the enable pin is high, the td300 is function- ning normally (inverted outputs). refer to section 1.5. for the enable function. 1.1.1.4. sense the sense input pin is connected to the negative input of a comparator. the positive input of this comparator is grounded, therefore, this comparator blocks the a/b/c outputs as soon as its input is below 0v. the sense input must not be lower than -0.4v. please refer to section 1.3. 1.1.2. outputs 1.1.2.1 outputs a/b/c the a/ b/c push-pull outputs of the td300 deliver 0-15v levels. these outputs are inverted. the a/b/c outputs are made to command power mos or igbt gates and can deliver 0.6a peak per channel. if the maximum current output is required, this current must be pulsed: . pulse width: 1 m s . duty cycle: 1% a continuous use of maximum output current capacity might cause device destruction. 1.1.2.2. alarm this signal is used to flag an abnormal situation to the mcu. please refer to section 1.4. 1.1.3. independant operational amplifier in the td300 device an additional operational amplifier is integrated that can be used in the user's application via its negative input and its output. its positive input is grounded. this operational amplifier has the few following characteristics: . cmos inputs . 10mv max input offset voltage . 1mhz typ gain bandwidth product . 60db typ open loop gain this operational amplifier can be used for current reading to be converted in the eventual mcu adc. please refer to section 1.6. 1.2. uvlo under voltage lockout the under voltage lockout functionis active when the supply voltage vcc is insufficient to ensure a correct drive of the power transistor. in order to avoid unproper switching states of the power mos or igbt that could lead to destruction of the transistors, the td300 outputs are locked at low state (open switches) until vcc has reached and kept a sufficient value (typ 12.5v +/-0.8v). a 0.8v hysteresis function has been added in order to avoid unwanted lockout due to parasitic nega- tive peak on v cc . therefore, no unwanted random state can be ap- plied on the commanded power mos or igbt, thus ensuring secure switching states. technical note 2/11
r sense :47 w r1 : 1k w r2 : 3.3k w c1 : 10nf hv : 35v load : 60w lamp + inductor 1.3. sense the sense comparator has two functions: . reflex : it automatically locks the a/b/c outputs at low state as soon as the sense in- put voltage is lower than the ground. this sense input level can be easily achieved with a shunt resistor and a resistor bridge as shown on figure 1. . alarm : it generates an active low alarm sig- nal to inform the mcu that overcurrent has been detected. when the sense comparator has detected an over- current and blocked the a/b/c outputs at low state, these outputs remain blocked to low state during a typical 1ms inhibition time. the inhibition time is important in the case of a repetitive attempt to switch on a short circuit to allow the switches to dissipate as little energy as possible or to let enough time to the mcu to make the appropriate decision. figure 1 shows the implementation of the sense function and its commutation traces when the power mos or igbt switches on a short circuit. the reader can see that when the current in the shunt resistor reaches the set value, the a/b/c outputs immediately fall to low state thus stopping the current in the power transistors. figure 1 1 - input 2 - output 3 - i (50mv = 0.1a) technical note 3/11
please note that because of the integrated esd diodes on the sense input, the sense voltage drop should not exceed 0.4v (the esd diodes start conducting around 0.4v). therefore, the sense resistor value and the resistor bridge rate should be calculated relatively to the expected current limitation following the equation: . r sense xi lim =(v cc x r2)/(r1+r2). where v cc equals 15v. some sample values are given in table 1. r sense m w i lim a v sense v bridge rate r1/r2 k w 20 5 0.1 150 150/1 10 0.2 75 150/2 10 20 0.2 75 150/2 30 0.3 50 47/1 5 40 0.2 75 150/2 60 0.3 50 47/1 annnex 1 explains how a 20m w sense resistor can be achieved directly on the printed board circuit. 1.4. alarm the alarm output is an open drain, and therefore needs an external pull-up resistor. the active low alarm pin indicates that one or both of the two following abnormal situations has been detected: . the supply voltage is insufficient (uvlo). . the sense comparator has detected overcurrent. this signal can be used by the mcu to make the appropriate decision. 1.5. enable when the enable pin is low, the a/b/c outputs are blocked to low state. when the enable pin is high, the td300 is function- ning normally (inverted outputs). the enable pin can be mcu controlled in order to switch the td300 in either on/off state. for example, when the alarm signal of the td300 is active, the mcu will interpret it as an abnormal situation and set the enable pin low in order to block the td300 a/b/c outputs during a definite time (100ms for example). when this relaxation time is over, the mcu will set the enable pin high, thus allowing a new attempt to normal functionning. 1.6. operational amplifier the integrated operational amplifier in the td300 is a classical low power cmos operational ampli- fier, and works totally independently with the rest of the circuit. this operational amplifier can be useful in any motor driving application, for example to translate the current value from analog to digital in an even- tual adc of the mcu such as the one in the st6/7/9 microprocessor. figure 8 shows a typical motor driving application where the op amp is used. 1.7. note because the td300 may have important peak current to provide on its outputs, the supply voltage must be bypassed by a capacitor in order to source the negative peak current caused by commuta- tions. a minimum of 1 m f is required for this capacitor. it is recommended that this capacitor should be placed as close as possible to the supply pins of the td300 for a maximum efficienty. 2. low side driving 2.1. low side driving the simplest configuration for the td300 user is low side driving: the switching power mos/igbt is between the load and the ground and the switching of the power mos / igbt is level controlled. the load may be any resistive, inductive or capaci- tive load. this configuration is found for example in the lower leg of half bridges for motor driving, relays or power lamps switching, any pulse width modu- lation application... 2.2. typical configurations the typical configuration shown below is valid for power mos/igbt that can conduct up to 20a typ . figure 2 shows a typical triple low side configura- tion, and points out the fact that only one sense resistor is needed for a complete current sensing. for larger transistors, or at high frequency opera- tion, the user must be aware of the output peak current capability of the td300; if this capability is insufficient to charge the power mos/igbt in a certain requested time, there is a possibility to increase the outpu t peak current capability by channel paralleling: please refer to section 3. technical note 4/11
figure 2 2.3. commutation traces figure 3 : commutation traces of a single low-side driving technical note 5/11
3. channel paralleling channel paralleling is an efficient way to increase the output peak current of the td300. this might be necessary when the power mos/igbt used has an important gate capacitance, and neverthe- less needs to be switched as fast as possible in order to reduce commutation losses and ensure proper switching states. the 3 inputs need to be connected together, and the same on the 3 outputs (refer to figure 4 and 5). the td300 needs then to be consideredas asingle driver. 3.1. typical configuration figure 4 and figure 5 show how to increase the output peak current capability of the td300 and how it is effectively increased. 3.2. commutation traces figure 4 figure 5 technical note 6/11
4. high side driving 4.1. high side driving in a high side configuration, the switch is placed between the positive power supply and the load. the switch being usually an nmos power transis- tor, 15v are needed to ensure proper gate charge via gate-source voltage. when the power mos/igbt is on, this 15v voltage is needed above the positive power rail. this can be achieved using a small pulse trans- former (please refer to annex 2) as shown in the figure below. 4.2. typical configurations figure 6 shows a typical high side driving configuration. an improved secondary circuit with high side short- circuit protection is detailed in the application note an461 : oa new isolated gate drive for power mos and igbtso. figure 6 figure 5-bis technical note 7/11
4.3. commutation traces figure 7 shows the commutation traces of the high side switching figure 7 4.4. high voltage the proposed solution is the right solution when the power mos/igbt to be driven has to stand very high voltage on its drain (>600v, 1kv typ), should it be floating or not. it ensures at the same time very high galvanic insulation to protect the mcu, and prevents the td300 against the parasitic coupling effects between high and low voltages. 5. half bridge 5.1. half bridge / motor driving td300 can be used to drive a wide range of motors: brushless, autocommutated, permanent magnet switched reluctance...; and in many segments: white goods, industrial, small appliance, heating and cooling... in 2 or 3 phases motors, the base configuration is the half bridge. 5.2. typical configuration figure 8 shows a typical configuration of a half bridge driving circuit. only one phase of the motor is represented. to drive a three phase motor, three td300 are needed, with 6 power mos/igbt. the sense and current amplifying functions are used for maximum control and security. 5.3. commutation traces the commutation traces are those of figure 3 and figure 7. 5.4. evaluation board the td300 evaluation board implements a half bridge configuration exactly reproducing the sche- matic of figure 8. technical note 8/11
figure 8 technical note 9/11
6. small motors direct driving 6.1. small motors the td300 outputs are all 3 cmos push-pull out- puts. therefore, it is possible to use 2 outputs and imitate thus a small ointegratedo half bridge configu- ration such as shown in the figure below. the td300 is able to drive directly small dc motors if the requested current doesn't over hang 200ma as well as small 3-phase motors. 6.2. configurations figure 9 shows how td300 is able to drive small dc motors. figure 10 shows how channel paralleling can increase dc output current capability. figure 9 figure 10 technical note 10/11
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such info rmation nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publi cation are subject to change without notice. this publ ication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for useas critical components in life support devices or systems without express written approval of stmicroelectronics. ? the st logo is a trademark of stmicroelectronics ? 1999 stmicroelectronics printed in italy all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - mexico - morocco the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. ? http://www.st.com 20mohm, 10mohm or lower values can be easily achieved directly on the printed circuit board know- ing the square resistance of the layout copper : . r = r[] x l / l the width of this printed sense resistor should be calculated in relation with its length in order to hold high current values. a nnex 2 pulse transformer such transformers are available in dil or so packages, triple or single, for example : . fil-mag : 23z284sm (triple so) 42z4056 (triple dil) 6z1304 (single dil) such transformers can be easily achieved using small ferrite torroids, small section insulated wires and wiring 10 turns on the primary and 10 turns on the secondary. a last solution consists in creating a pulse trans- former on the board itself : the board has to be double sided, and the primary and the secondary circuits can be directly printed on each side of the board (10 turns on the primary, 10 turns on the secondary). appropriate wholes are to be done to mount the two parts of a ui ferrite. annex annex 1 technical note 11/11

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